Semiconductors have driven major technology breakthroughs over the last 4 decades and are the key enabling technology for implementing new systems to solve major challenges of mankind especially in the areas energy, mobility, security, health, and communication.

There is an ongoing strong trend to integrate ever more functionality onto one single chip, in order to reduce power consumption, to gain speed, and to save cost.

In order to lead technological development now and in future and to increase one's share in highly competitive large markets, it is mandatory to cultivate competencies and skills in the design of integrated circuits and systems.

The center of competence DECS performs advanced research and teaching in design and methodology of integrated circuits on all levels of abstraction.

Mission & Goals

DECS provides the necessary competencies, methodologies, and design environments for education and research in new semiconductor based solutions. Highly innovative systems can only be realized if power-optimized and very small, i.e. highly integrated, hardware is available.

System requirements such as speed, power, yield, reliability, security or safety call for new approaches to heterogeneous silicon systems with software, (embedded) hardware - comprising analog, mixed-signal, digital, RF, transistor and memory devices, realized in CMOS and other technologies, as well as in FPGAs.

DECS develops and provides comprehensive skills, design environments, and solution approaches to build integrated circuits and systems for areas like communication, sensing, medical electronics, robotics, embedded systems and neuro-engineering.

Core Competencies

  • Hardware accelerators for Multicore System-on-Chip
  • Circuits for System-on-Chip resilience and dependability improvements
  • Secure implementation of cryptographic primitives
  • Secure embedded system and circuit design
  • Physically consistent modeling across several layers of abstraction
  • Low power analog & digital CMOS circuits
  • Design for reliability and yield
  • Algorithms for analysis and optimization of integrated circuits and systems
  • Analog design automation


  • Architectures, design methods and tools for application-specific multi-processor systems-on-chip (MPSoC)
  • Development of prototype demonstrators in FPGA Technology
  • HW/SW-Codesign of secure hardware and secure embedded (sub)systems
  • Detection and countermeasures to attacks on secure systems
  • Semiconductor based Physical Unclonable Functions as new security primitives
  • Design methodology for security critical circuits
  • Design automation, design optimization and design centering for yield
  • Design of reliable analog and mixed signal circuits


  • Participation in coordinated research program (DFG) “Invasive Computing” with projects in the range from architectural level down to physical design: Fault tolerant architectures and HW/SW codesign, modeling and design optimization, and design of a hardware monitoring system needed for this novel computing paradigm
  • Design for Reliability: Research on models, test structures, characterization methodologies, circuit design strategies; in future also architecture design: Participation in EU project CATRENE within subproject RELY (Design for Reliability of SoCs for Applications like Transportation, Medical, and Industrial Automation)
  • Cooperation with Fraunhofer in the area of reverse engineering within the "Leistungszentrum" Secure Connected Systems: more information here