Module Number: EI70630
Duration: 1 Semester
Occurence: Winter and Summer semester
Number of ECTS: 5
Professor in charge: Andreas Herkersdorf
Amount of work
Contact hours: 60
Self-studying hours: 120
Description of achievement and assessment methods
Examination with the following elements: - Written examination
Exam type: written
Possibilityof re-taking :In the next semester: Yes At the end of the semester: No
Written paper: No
Design flow from function graphs to FPGA netlists and executable object code for microprocessor, modeling andspecification of mixed hardware/software solutions for embedded systems, graph partitioning and binding toexecution units, scheduling, estimation of design quality, target architectures and prototyping platforms forHW/SW systems, basic introduction into VHDL and SystemC. The lecture contents are applied in an accompanyinglaboratory with the following focal points: system modeling and evaluation; implementation of an exampleapplication on an FPGA prototyping board using the embedded processor and a specific hardware accelerator.
At the end of the module students will know the major problems in the design of combined HW/SW systems und will gain insights in methods and algorithms that help in solving them. The lab part of the course conveys hands on experience in the realization and evaluation of architecture alternatives using system level models and FPGA-based prototypes.
Teaching and learning methods
- Learning method: In addition to the individual methods of the students additional knowledge is acquired by individual lab exercises, which are supported by tutor hours .
- Teaching method: During the lectures students are instructed in a teacher-centered style. The lecture is supported by lab exercises to gain hands on experience on selected problems.
The following kinds of media are used:
- Lab manual with the decription of the exercises
The following literature is recommended:
- Approach towards a real-world HW/SW Codesign project