Digital System Design with VHDL and System C

Lecturer (assistant)
Number0000003406
Type
Duration4 SWS
TermWintersemester 2020/21
Language of instructionGerman
Position within curriculaSee TUMonline

Dates

Admission information

See TUMonline
Note: Note: Registration on TUMOnline before the first lecture

Objectives

The students will learn the abstraction, modeling and design techniques. Furthermore, the students will be familiar with an industrial design system and the modeling language VHDL (WS) and System C (SS).

Description

ATTENTION: IN WS 20/21 THIS IS A BLOCK COURSE OUTSIDE THE REGULAR COURSE PERIOD IN THE LECTURE-FREE TIME AFTER WS 2019/20, probably in March 2021. It is planned to conduct the course in physical presence. The number of participants is therefore limited. The preliminary plan (no warranty) for the exam is oral form, and online or in physical presence at participants discretion. Hardware description language VHDL and SystemC, design methodology with VHDL and SystemC, VHDL/SystemC modeling, VHDL/SystemC simulation and VHDL/SystemC synthesis, methods of logic synthesis, register-transfer synthesis and high-level synthesis; computer lab exercises in VHDL/SystemC modeling, automatic synthesis and selected synthesis methods.

Prerequisites

Basic knowledge in digital design; one programming language (at best C or C++) is absolutely necessary.

Teaching and learning methods

As teaching method learning using examples will be used. According to one example (a MIPS2 subsystem) the requirements are motivated, presented and then generalized. The learning content will be deepened by team wok and incorporation of industrial working styles.

Examination

Examination with following parts: - Written examination at the end of the course (60 min., no notes allowed) (50%) - Graded homework/projects (4 parts: memory model, functional CPU model, behavioral CPU model, RTL CPU model) (50%)

Recommended literature

Following materials are recommended: * Computer Organization And Design The Hardware/Software Interface; David A. Patterson, John L. Hennessy, Elsevier * John L. Hennessy, David A. Patterson: Computer Architecture - A Quantitative Approach, Elsevier / Morgan Kaufmanns Publishers. * Dominic Sweetman: See MIPS Run Linux, Elsevier / Morgan Kaufmanns Publishers. * Peter Ashenden: The Designer’s Guide to VHDL, Morgan Kaufmann Series in Systems on Silicon) * Thinking in C++ 2nd Edition by Bruce Eckel * SystemC: From the Ground Up (the Kluwer International Series in Engineering & Computer Science) (Hardcover) * Transaction-Level Modeling with SystemC: TLM Concepts and Applications for Embedded Systems. Internet Resources: * http://en.wikipedia.org/wiki/MIPS_architecture * http://www.mips.com/products/processors/ * http://tams-www.informatik.uni-hamburg.de/vhdl/doc/cookbook/VHDL-Cookbook.pdf

Links


All courses

Bachelorbereich: BSc-EI, MSE, BSEEIT

 

WS

SS

Diskrete Mathematik für Ingenieure (BSEI, EI00460)

Discrete Mathematics for Engineers (BSEEIT) (Schlichtmann) (Januar)

 

O

WS

SS

Entwurf digitaler Systeme mit VHDL u. System C (BSEI, EI0690) (Ecker)

WS 20/21 block course after lecture period

P

 

SS

Entwurfsverfahren für integrierte Schaltungen (MSE, EI43811) (Schlichtmann)

 

WS

 

Methoden der Unternehmensführung (BSEI, EI0481) (Weigel)

O

WS

 

Praktikum System- und Schaltungstechnik (BSEI, EI0664) (Schlichtmann et al.)

?

 

SS

Schaltungssimulation (BSEI, EI06691) (Gräb/Schlichtmann)

 

 

Masterbereich: MSc-EI, MSCE, ICD

 

SS

Advanced Topics in Communication Electronics (WS20/21: Willy Sansen) (MSCE, MSEI, EI79002)

P

WS

 

Aspects of Integrated Systems Technology & Design (MSCE, MSEI, EI5013) (Wurth)

fällt aus

WS

 

Electronic Design Automation (MSCE, MSEI, EI70610) (B. Li, Tseng)

O

WS

 

Design Methodology and Automation (ICD) (Schlichtmann) (Nov)

 

WS

SS

Machine Learning: Methods and Tools (MSCE, MSEI, EI71040) (Ecker)

O

WS

SS

SS

Mathematical Methods of Circuit Design (MSCE, MSEI, EI74042) (Gräb)

Simulation and Optimization of Analog Circuits (ICD) (Gräb) (Mai)

O+P

WS

 

Mixed Integer Programming and Graph Algorithms in Engineering Problems (MSCE, MSEI, EI71059) (Tseng)

O

WS

SS

Numerische Methoden der Elektrotechnik (MSEI, EI70440) (Diepold oder Schlichtmann)

O

WS

WS

SS

Seminar VLSI-Entwurfsverfahren (MSEI, EI7750) (Schlichtmann/Müller-Gritschneder)

Seminar on Topics in Electronic Design Automation (MSCE, EI77502) (Schlichtmann/Müller-Gritschneder)

O P?

O

WS

SS

Synthesis of Digital Systems (MSCE, MSEI, EI70640) (Müller-Gritschneder)

O

WS

 

Testing Digital Circuits (MSCE, MSEI, EI50141) (Otterstedt)

P

WS

 

Timing of Digital Circuits (MSCE, MSEI, EI70550) (B. Li, Zhang)

O

WS

SS

VHDL System Design Laboratory (MSCE, MSEI, EI7403) (Schlichtmann)

O

WS

SS

VLSI Design Laboratory (MSCE, MSEI, EI5043) (Schlichtmann)

fällt aus

 

The right-most column describes the planned type of lecture in the winter term 2020/21 - assuming that lecture halls are available: O=online, P=presence

 

MSE: Munich School of Engineering (TUM)
BSEEIT: Bachelor in Electrical Engineering and Information Technology (TUM-Asia)
ICD: Master of Science in Integrated Circuit Design (TUM-Asia)
MSCE: Master of Science in Communications Engineering (TUM)

MSEI: Master of Science in Elektrotechnik und Informationstechnik

BSEI: Bachelor of Science in Elektrotechnik und Informationstechnik

 

Please keep yourself updated at https://www.tum.de/die-tum/aktuelles/coronavirus/studium/ and www.ei.tum.de for updated information about teaching.