Offered thesis

There are no specific thesis offered at this moment.
Please contact a research assistant, if your are interested in a topic at our institute.

You can inform yourself here about the research areas at our institute


Assigned Theses

Parallelisierung eines Synthesealgorithmus für analoge SchaltungenI. AbelClara Kowalsky
TLM Transactor for AXI-based RTL-ModelsJ. GeierSeif Werghi
SystemC Modeling of Pulpino SoC PeripheralsD. Müller-G.reserved
Development of a DSL for a Runtime Verification SystemM. MettlerNing Lu
Updating the Just-in-Time Engine for the Instruction Set Simulator ETISSR. StahlDhia Zouaghi
Development of an online schema design tool for microfluidic large-scale integrationT.-M. TsengXin Wen
Router Port Assignement for Wavelength-Routed Optical Network-on-ChipT.-M. TsengXinyu Zhang