Offered thesis

There are no specific thesis offered at this moment.
Please contact a research assistant, if your are interested in a topic at our institute.

You can inform yourself here about the research areas at our institute

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Assigned Theses

Topic	Assistent	Student
Parallelisierung eines Synthesealgorithmus für analoge Schaltungen	I. Abel	Clara Kowalsky
Automated Generation of Integration Tests for Functional Verification of Instruction Set Simulators	J. Geier	reserved
TLM Transactor for AXI-based RTL-Models	J. Geier	reserved
SystemC Modeling of Pulpino SoC Peripherals	D. Müller-G.	reserved
Development of a DSL for a Runtime Verification System	M. Mettler	Ning Lu
Adding Operators for Machine Learning on Microcontrollers	R. Stahl	Oussama Sayari
Evaluating an Instruction Set Simulator with RISC-V Instruction Tests	R. Stahl	Van Hien Nguyen
Updating the Just-in-Time Engine for the Instruction Set Simulator ETISS	R. Stahl	Dhia Zouaghi
Development of an online schema design tool for microfluidic large-scale integration	T.-M. Tseng	Xin Wen
Router Port Assignement for Wavelength-Routed Optical Network-on-Chip	T.-M. Tseng	Xinyu Zhang