Offered thesis

There are no specific thesis offered at this moment.
Please contact a research assistant, if your are interested in a topic at our institute.

You can inform yourself here about the research areas at our institute


Assigned Theses

Parallelisierung eines Synthesealgorithmus für analoge SchaltungenI. AbelClara Kowalsky
Automated Generation of Integration Tests for Functional Verification of Instruction Set Simulators J. Geierreserved
TLM Transactor for AXI-based RTL-ModelsJ. Geierreserved
SystemC Modeling of Pulpino SoC PeripheralsD. Müller-G.reserved
Development of a DSL for a Runtime Verification SystemM. MettlerNing Lu
Adding Operators for Machine Learning on MicrocontrollersR. StahlOussama Sayari
Evaluating an Instruction Set Simulator with RISC-V Instruction TestsR. StahlVan Hien Nguyen
Updating the Just-in-Time Engine for the Instruction Set Simulator ETISSR. StahlDhia Zouaghi
Development of an online schema design tool for microfluidic large-scale integrationT.-M. TsengXin Wen
Router Port Assignement for Wavelength-Routed Optical Network-on-ChipT.-M. TsengXinyu Zhang