Offered Theses
Just contact a research assistant, if you are interested in a topic not listed here.
Assigned Theses
Topic | Assistent | Student |
---|---|---|
Development of a Virtual Prototype of a security RISC-V System on Chip | D. Müller-G. | Andrea Lardschneider |
Automated Test Coverage Analysis for Test-Driven Software Development using ETISS | Y. Moradi | Philipp Fengler |
RTL Accurate Fault Injection for RISC-V SoCs | U. Sharif | Xubin Wang |
Sihft development for soft-errors for embedded applications | U. Sharif | Chaoqun Liang, Yicheng Qiu, Simon Jarc |