Today we got informed that the Steering Committee of the HiPEAC (High Performance and Embedded Architecture and Compilation) Network of Excellence awarded a HiPEAC Paper Award to our paper titled "SOSA: Self-Optimizing Learning with Self-Adaptive Control for Hierarchical System-on-Chip Management" (DOI link), which was published at the International Symposium on Microarchitecture (MICRO) 2019.
The authors Bryan Donyanavard, Armin Sadighi, Florian Maurer, Tiago Mück, Amir M. Rahmani, Andreas Herkersdorf, and Nikil Dutt propose a two-layer resource manager for MPSoCs. The manager consists of a hardware learning engine to control DVFS and task migration in the lower layer and a software supervisor guiding the learning of the lower layer based on the current operating mode like high-performance computing or power saving.
The IEEE/ACM International Symposium on Microarchitecture® is the premier forum for presenting, discussing, and debating innovative microarchitecture ideas and techniques for advanced computing and communication systems.
MICRO 2019 took place October 12-16, 2019 in Columbus, Ohio, USA.