Florian Maurer, M.Sc.

Today's Multi-Processor System-on-Chip (MPSoCs) are getting more and more complex due to the growing amount of cores and accelerators.  Hence it's not possible anymore to set runtime parameters like frequency and task distribution by design time in an optimal manner. Therefore future controllers try to make use of machine learning which is aware of the system's current state (self-awareness).

Information Processing Factoriy (IPF) is a global project that claims to show self-awareness across multiple abstraction levels. It represents a paradigm shift in platform design by envisioning the move towards a consistent platform-centric design in which the combination of self-organized learning and formal reactive methods guarantee the applicability of such cyber-physical systems in safety-critical and high-availability applications.

At TUM, we explore the application and implementation of machine learning algorithms in hardware to optimize the mode of operation of MPSoCs at runtime. 

Towards this goal, you'll complete the following tasks:

1. Understand state of the art debugg mechanisms, which overcome the off-chip bottle neck
2. Investigate error symptoms, their causes and possible metics to prove them for LCTs.
3. Design and implement the debugger (VHDL on HW side + maybe Matlab on Host side)
4. Verify your design

To successfully complete this project, you should already have the following skills and experiences: 

• Excellent knowledge about LCTs
• Good VHDL Skills
• Good C / C ++ Skills
• Good Matlab Skills
• Good Understanding of MPSoCs
• Self-motivated and structured work style

Florian Maurer
Chair of Integrated Systems 
Arcisstrasse 21, 80333 Munich Germany
Tel. +49 89 289 23870 
flo.maurer@tum.de 
www.lis.ei.tum.de

Today's Multi-Processor System-on-Chip (MPSoCs) are getting more and more complex due to the growing amount of cores and accelerators.  Hence it's not possible anymore to set runtime parameters like frequency and task distribution by design time in an optimal manner. Therefore future controllers try to make use of machine learning which is aware of the system's current state (self-awareness).

Information Processing Factory (IPF) is a global project that claims to show self-awareness across multiple abstraction levels. It represents a paradigm shift in platform design by envisioning the move towards a consistent platform-centric design in which the combination of self-organized learning and formal reactive methods guarantee the applicability of such cyber-physical systems in safety-critical and high-availability applications.

At TUM, we explore the application and implementation of machine learning algorithms in hardware to optimize the mode of operation of MPSoCs at runtime. 

Therefore, we currently evaluate our research primary on FPGAs, but also by Gem5 simulations. Unfortunatelly, the FPGA evaluation causes long and quite complex developement and Gem5 simulation is time intensive when running experiments several times for different parameters or approaches.

To overcome these two issues, you will extend a simulation environment which performs trace-based DVFS (should be extended to Task Migration) simulation in Matlab towards a multi-core system.

Your environment should keep using Gem5 traces and provide performance and power metrics, as well as the current state like utilization as outputs when performing DVFS in a multicore system. Hereby, your environment has to account for shared resources.

Towards this goal, you'll complete the following tasks:

1. Literature research on the state of the art of trace-based simulation
2. Getting familiar with object orientated programming in Matlab
3. Developping your simulation environement in Matlab
4. Verifying your environement by comparing to Gem5

This topic can be extended to a Master Thesis.

• Good Knowledge about MPSoCs
• Good Matlab Knowledge
• Good Bash Knowledge
• Basic Knowledge about Trace-Based Simulation
• Maybe Gem5 Knowledge

flo.maurer@tum.de

Student projects will be continued and started also under the current circumstances (SARS-CoV-2). This task can be executed remotly by accessing our chair's computers, or a students personal device, as all needed programs are either free or a student license is available.