Technical University of Munich
Department of Electrical and Computer Engineering
Chair of Integrated Systems
Building: N1 (Theresienstr. 90)
- At LIS since 2016
- B.Sc. & M.Sc. EI at TUM
- 12 months FPGA development at ARRI (BA, FP, MA)
- 1 semester at Georgia Tech
Interested in an internship or a thesis? Please send me en email.
The given type of work is just a guideline and could be changed if needed.
From time to time, there might be some work, that is not announced yet. Feel free to ask!
- Trace Generation for Near Memory Acceleration Framework (Master Thesis, Akshatha Mangala Kenche Gowda, 2019)
- Implementation of an Advanced Dynamic Data Migration Scheme (Bachelor Thesis, Peter Körner, 2019)
- Improving and Extending a Simulator Model for Dynamic Data Migration (Research Practice, Stephan Böck, 2019)
- Improving and Evaluating the Simulation Environment for Dynamic Data Migration (Bachelor Thesis, Jonas Kirf, 2018)
- Implementation of Advanced Graphcopy Features and the Development of a Testsuite (Research Practice, Oliver Lenke, 2018)
- Design and Implementation of a Near Memory Graphcopy Accelerator (Research Practice, Lars Nolte, 2018)
- Design and Implementation of a Near-Memory Accelerator Simulation Framework (Research Practice, Matthias Engelhard, 2018)
- Efficiant Management of Network Function in NoC based Multicore Systems (Master Thesis, Steffen Schlienz, 2018)
- Research on and Implementation of a Hardware-Managed Queue (Research Practice, Alexander Preißner, 2018)
- Design of a Near Memory Accelerator Concept for Distributed Shared Memory Architectures (Bachelor Thesis, Oliver Lenke, 2018)
- Implementation and Evaluation of a Generic DMA Controller on a Distributed Shared Memory Architecture (Bachelor Thesis, Lars Nolte, 2018)
- Simulator Support for Dynamic Data Migration (Master Thesis, Iffat Brekhna, 2018)
- Improving Synchronization for Distributed Memory Systems (Working Student, Andreas Schenk, 2018)
- Address Translation Unit - enabling a global address space for invasive computing (Bachelor Thesis, Emin Saidi, 2017)
- Address Map Protection on a Tiled Multi-Processor Platform (Research Practice, Alexander Gembarzhevskiy, 2016)
- Design and Implementation of a Compare-and-Swap (CAS) Instruction over a Network on Chip (NoC)
(Research Practice, Andreas Schenk, 2016)
Invasive Computing (SFB/TR 89)
- Teilprojekt B5 - Memory Hierarchy
- Teilprojekt Z2 - FPGA Integration, Validation & Demonstrator
Hitting a wall is not a pleasant thing. Computer systems faced many walls in the last decades. Being able to break the memory wall in the mid 90's and the power wall in 2004, it now faces the next crucial barrier for scalabilty. Although being able to scale systems to 100's or 1000's of cores through NoCs, performance doesn't scale due to data-to-task dislocality. We now face the locality wall.
The newest trend to tackle this issue is data-task migration and processing in or near memory.
- X-CEL: A Method to Estimate Near-Memory Acceleration Potential in Tile-based MPSoCs. ARCS 2020 - 33rd International Conference on Architecture of Computing Systems, 2020 more… BibTeX
- DySHARQ: Dynamic Software-Defined Hardware-Managed Queues for Tile-based Architectures. International Journal of Parallel Programming, 2020 more… BibTeX
- Tackling the MPSoC Data Locality Challenge. In: Multi-Processor System-on-Chip. ISTE Editions , 2020 more… BibTeX
- X-Centric: A Survey on Compute-, Memory- and Application-Centric Computer Architectures. MEMSYS'20: The International Symposium on Memory Systems , 2020 more… BibTeX
- CoD: Coherence-on-Demand - Runtime Adaptable Working Set Coherence for DSM-based Manycore Architectures. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIX) , 2019 more… BibTeX
- NEMESYS: Near-Memory Graph Copy Enhanced System-Software. MEMSYS 19: The International Symposium on Memory Systems, 2019 more… BibTeX
- SHARQ: Software-Defined Hardware-Managed Queues for Tile-Based Manycore Architectures. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIX), 2019 more… BibTeX