Students

Name   Aufgabe / Task    
BLOCK, Sebastian   Masterarbeit: Development of a Generic Framework for Task Offloading to Hardware in Linux on a Multicore Architecture    
EHRHARDT, Daniel   Wiss. Hilfskraft: HW-in-teh-Loop Optimization for Efficient Inferenc of Pruned and Binary Neural Networks    
di GIOIA, Allesandro   Master: Efficient Instruction Set Architecture for Convolutional Neural Network Accelerators    
GAHR, Johannes   Master: LSTM-based Forecasting for Multi-Core Processors    
GHOSH, Uttal   Forschungspraxis: Continuous Integration set up for a Gem5 Simulator project    
KIRF, Jonas   Masterarbeit: Development of a Generic Framework for Task Offloading to Hardware in Linux on a Multicore Architecture    
MAO, Lingfan   Masterarbeit: Sparse Lookup Tables with dynamic precision adaption for image processing on FPGA    
NEUMEIER, Michael   Forschungspraxis: Benchmarking CNNs on Hardware Accelerators for Embedded Applications (NVIDA)    
NOEPEL, Jens   Umarbeitung VHDL    
PENG, Li Yu   Masterarbeit: Implementing a Dynamic Frequency Scaling (DFS) Emulation Interface for the Leon3 Processor on an FPGA Prototype    
PETRI, Richard   Forschungspraxis: Utilization Monitoring and Analysis on a Network-on-Chip    
SABBADINI, Sebastian   Masterarbeit: Implementation of a Digital Holography (DH) phase reconstruction algorithm on FPGA    
SCHEDLER, Samuel   Forschungspraxis: Evolutionary Functional Approximation of Digital Circuits    
SCHMELZLE, Jan-Niklas   Forschungspraxis: Implementation and Hardware Exploration of a Weight Stationary Spatid CNN Accelerator    
SCHWARZ, Niklas   Bachelorarbeit: FPGA Remote Access für das Projektpraktikum IC Entwurf    
SHKURTI, Daniel   Forschungspraxis: Application Scheduling on self-aware Embedded Systems    
ZHANG, Yizhe   Forschungspraxis: Multi-Objective Optimization of LSTM NN