Theses and Internships

On this page you can find theses and internship positions currently offered at the Chair of Security in Information Technoloty and at the Fraunhofer AISEC. If you are uncertain about your previous knowledge for a topic, please feel free to contact the person specified in the offer. You have not found a topic but still want to do your thesis with us? Please contact a staff member from the research area of your ​​interest. Please attach a current grade sheet and a short CV to your application so that we can assess your qualification for the topic of your choice.

Open Theses and Internships

Bachelor's Theses

Machine learning for graph clustering

Hardware Trojan Detection based on Controllability and Observability

Algebraic Fault Attack Tooling

Enhancing SIFA

Implementation of Hardware Trojans

Side - channel analysis of error - correcting codes for PUFs

Further Topics on Physical Unclonable Functions

Master's Theses

Machine learning for graph clustering

Hardware Trojan Detection based on Controllability and Observability

Entwicklung eines Frameworks für Usage Control and Enforcement für Linux-basierte eingebettete Systeme (AISEC)

Nonlinear Laser fault injection in semiconductor devices

Utilizing Machine Learning in Side Channel Analysis (AISEC)

Implementation of Hardware Trojans

Deep Learning Techniques for Side-Channel Attack

Side-Channel Attack on PUF Primitives Using Localized EM

Side - channel analysis of error - correcting codes for PUFs

Further Topics on Physical Unclonable Functions

Interdisciplinary Projects

Development of a Smart Card Reader

Algebraic Fault Attack Tooling

Enhancing SIFA

Side - channel analysis of error - correcting codes for PUFs

Further Topics on Physical Unclonable Functions

Research Internship (Forschungspraxis)

Machine learning for graph clustering

Hardware Trojan Detection based on Controllability and Observability

Development of a Smart Card Reader

Algebraic Fault Attack Tooling

Enhancing SIFA

Fuzzing of the Accelerator Coherency Port on Zynq Ultrascale+

Deep Learning Techniques for Side-Channel Attack

Automation of Sequential Locking Scheme Insertion

Side-Channel Attack on PUF Primitives Using Localized EM

Side - channel analysis of error - correcting codes for PUFs

Further Topics on Physical Unclonable Functions

Internships

Developing tools for chip reverse engineering

Development of a Smart Card Reader

Algebraic Fault Attack Tooling

Automation of Sequential Locking Scheme Insertion

Further Topics on Physical Unclonable Functions

Student Assistant Jobs

Backend and Mobile/Web Software Development (AISEC)

Development of a Smart Card Reader

Algebraic Fault Attack Tooling

Enhancing SIFA

Working Student - Hardware Reverse Engineering Tools

Tutor/in: Sichere Implementierung kryptographischer Verfahren

Improvement of a Web-Application

Further Topics on Physical Unclonable Functions