EOS/ESD Symposium is the leading conference in the field of electrostatic discharge and electrical overstress. It offers the unique possibility to get a wide scope understanding of the challenges ahead to safeguard IC design, Manufacturing, and handling in the field. Influencing standards, creating best practices, and technical direction setting requires personal attendance at this premier event to connect with industry leaders. Expert meetings and state-of-the-art technical papers set the direction for Industry such as defining relevant IC sensitivity design targets.
Lena Zeitlhöfler is presenting her work:
An energy-based failure is analyzed for Charged-Device-Model-like (CDM) discharges. The stress of an electrostatic discharge (ESD) element can be quantified and simulated, if the background capacitance of an IC domain is known. Differences between package-, wafer- and board-level are evaluated using the Capacitively Coupled Transmission Line Pulsing (CCTLP) method. The difference in the switching behavior of an ESD element due to capacitance relations is evaluated on package- and wafer-level.