Networks-on Chip (NoC) have emerged for providing scalable on-chip communication interconnects and better modularity than the global
bus based systems. Early research in NoC architectures was conducted towards the goal to provide an optimized topology in terms of throughput, latency and area for a given application.

In the scope of invasive computing, the sub-project InvasIC-B5 studies novel NoC concepts to provide performance improvments for a wide range of applications. NoC architecture supporting these concepts are called invasive NoCs or iNoCs. In addition to standard packet routing, an iNoC shall support the invasion of application-specific routing channels and topologies during the lifetime of an application. This will help to provide guaranteed bandwidth to such applications by ensuring the optimized link utilization of on-chip communication infrastructure.