Tiled manycore System-on-Chip have become a common way to integrate tens or even hundreds of processor cores in future processing platforms. At LIS we research enhancements of such platforms in different projects, for example network adapters that couple computing and communication in such tiled manycore platforms.
Prototyping such enhancements for manycore systems apparently requires the availability of a baseline system, ideally at different configurations. As many researches do not have such a system at hand, they are often restricted to (system level) simulation or need to build such a system from scratch which is complex.
Facing this issue we have started working on OpTiMSoC (Open Tiled Manycore System-on-Chip), a free and open library of building blocks for a manycore SoC. The foundation of an OpTiMSoC instance is LISNoC, our open source Network-on-Chip implementation. Different kinds of tiles are connected to the NoC.
OpTiMSoC is freely available and contribution is welcome. Further information can be found on the project page.
DiaSys: Improving SoC insight through on-chip diagnosis. Journal of Systems Architecture, 2017 more… BibTeX Full text ( DOI )
What happens on an MPSoC stays on an MPSoC - unfortunately! 2016 International Symposium on Integrated Circuits (ISIC), 2016 more… BibTeX Full text ( DOI )
Open Tiled Manycore System-on-Chip. Lehrstuhl für Integrierte Systeme, 2013, more… BibTeX
HW-OSQM: Reducing the Impact of Event Signaling by Hardware-based Operating System Queue Manipulation. International Conference on Architecture of Computing Systems (ARCS), Springer, 2013, 280-291 more… BibTeX
A Framework for Open Tiled Manycore System-on-Chip. 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012 more… BibTeX