System-on-Chip Technologies

Vortragende/r (Mitwirkende/r)
Umfang3 SWS
SemesterWintersemester 2020/21




The objective of this course is to impart a general understanding of the structure and operation of systems-on-chip. Main building blocks of a system-on-chip, e.g. processor, on-/off-chip memories, interconnect are introduced. Implementation methods as well as techniques for low power consumption are addressed.


This course provides basics, current trends and challenges in the development of digital system-on-chip (SoC). We start with the main steps for building arbitrary CMOS-based combinatorial logic and sequential digital data processing and control circuitry (e.g. Finite State Machines) and explaining their role and significance in the scope of key system-on-chip components: microprocessors, memories and interconnects. The microarchitectural structure and building blocks of processor elements (RISC cores), on-/off-chip memory technology (SRAM, DRAM, Flash), bus and point-to-point interconnect standards (Processor Local Bus, Advanced Microcontroller Bus Architecture, FIFO) as well as the design of communications specific arithmetic blocks (adder, multipliers, shift and comparators) will be introduced and analyzed. Finally, we will introduce main implementation methods for SoCs, such as FPGA, standard cell and full custom design, and discuss methods for low power design, which is vital for the development of SoCs in embedded systems.

Inhaltliche Voraussetzungen

Bachelor courses on semiconductor devices and digital circuits, basics in computer architecture

Lehr- und Lernmethoden

The lecture is structured into a presentation and an associated tutorial. The lecture will be given via internet and is complemented by online Q&A sessions. The tutorial will be done online via live video sessions.

Studien-, Prüfungsleistung

Unsupervised online exercise (written, 60 minutes)

Empfohlene Literatur

- J. Hennessy, "Computer Architecture. A Quantitative Approach", Elsevier - J. Rabaey, "Digital Integrated Circuits", Prentice Hall - N. Weste, K. Eshraghian, "Principles of CMOS VLSI Design", Addison Wesley