Sven Rheindt, M.Sc.

Wissenschaftlicher Mitarbeiter  

Technische Universität München
Fakultät für Elektrotechnik und Informationstechnik
Lehrstuhl für Integrierte Systeme
Arcisstr. 21
80290 München
Tel.: +49.89.289.28387
Fax: +49.89.289.28323
Gebäude: N1 (Theresienstr. 90)
Raum: N2114
E-mail: sven.rheindt@tum.de

Lebenslauf

  • Am LIS seit 2016
  • B.Sc & M.Sc EI an der TUM
  • 12 Monate in der FPGA Entwicklungsabteilung bei ARRI (BA, FP, MA)
  • 1 Semester an der Georgia Tech

Lehre

 

Studentische Arbeiten

Interesse an einer Studien- oder Abschlussarbeit? Schreiben Sie mir gerne eine E-Mail.
Die angegebene Art der Arbeit dient als Richtlinie und kann nach Absprache auch angepasst werden.
Es gibt auch immer wieder Arbeiten, die noch nicht ausgeschrieben sind. Einfach mal nachfragen!

Angebotene Arbeiten

Laufende Arbeiten

Seminare

Analysis of Hardware and Software Workstealing Approaches

Analysis of Software Graph Processors

Analysis of Near Memory Graph Accelerators

Betreute Arbeiten

  • Trace Generation for Near Memory Acceleration Framework
    (Masterarbeit, Akshatha Mangala Kenche Gowda, 2019)
  • Implementation of an Advanced Dynamic Data Migration Scheme
    (Bachelorarbeit, Peter Körner, 2019)
  • Improving and Extending a Simulator Model for Dynamic Data Migration
    (Forschungspraxis, Stephan Böck, 2019)
  • Improving and Evaluating the Simulation Environment for Dynamic Data Migration
    (Bachelorarbeit, Jonas Kirf, 2018)
  • Implementation of Advanced Graphcopy Features and the Development of a Testsuite
    (Forschungspraxis, Oliver Lenke, 2018)
  • Design and Implementation of a Near Memory Graphcopy Accelerator
    (Forschungspraxis, Lars Nolte, 2018)
  • Design and Implementation of a Near-Memory Accelerator Simulation Framework
    (Forschungspraxis, Matthias Engelhard, 2018)
  • Efficiant Management of Network Function in NoC based Multicore Systems
    (Master Thesis, Steffen Schlienz, 2018)
  • Research on and Implementation of a Hardware-Managed Queue
    (Forschungspraxis, Alexander Preißner, 2018)
  • Design of a Near Memory Accelerator Concept for Distributed Shared Memory Architectures
    (Bachelorarbeit, Oliver Lenke, 2018)
  • Implementation and Evaluation of a Generic DMA Controller on a Distributed Shared Memory Architecture
    (Bachelorarbeit, Lars Nolte, 2018)
  • Simulator Support for Dynamic Data Migration
    (Masterarbeit, Iffat Brekhna, 2018)
  • Improving Synchronization for Distributed Memory Systems
    (Werkstudent, Andreas Schenk, 2018)
  • Address Translation Unit - enabling a global address space for invasive computing
    (Bachelorarbeit, Emin Saidi, 2017)
  • Address Map Protection on a Tiled Multi-Processor Platform
    (Forschungspraxis, Alexander Gembarzhevskiy, 2016)
  • Design and Implementation of a Compare-and-Swap (CAS) Instruction over a Network on Chip (NoC)

    (Forschungspraxis, Andreas Schenk, 2016)

Forschung

Projekte

Invasive Computing (SFB/TR 89)

  • Teilprojekt B5 - Memory Hierarchy
  • Teilprojekt Z2 - FPGA Integration, Validation & Demonstrator

Interessen

Hitting a wall is not a pleasant thing. Computer systems faced many walls in the last decades. Being able to break the memory wall in the mid 90's and the power wall in 2004, it now faces the next crucial barrier for scalabilty. Although being able to scale systems to 100's or 1000's of cores through NoCs, performance doesn't scale due to data-to-task dislocality. We now face the locality wall.

The newest trend to tackle this issue is data-task migration and processing in or near memory.

Publikationen

2019

  • Akshay Srivatsa, Sven Rheindt, Dirk Gabriel, Thomas Wild, Andreas Herkersdorf: CoD: Coherence-on-Demand – Runtime Adaptable Working Set Coherence for DSM-based Manycore Architectures. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIX) , 2019 mehr… BibTeX
  • Sven Rheindt, Andreas Fried, Oliver Lenke, Lars Nolte, Thomas Wild, Andreas Herkersdorf: NEMESYS: Near-Memory Graph Copy Enhanced System-Software. MEMSYS 19: The International Symposium on Memory Systems, 2019 mehr… BibTeX
  • Sven Rheindt, Sebastian Maier, Florian Schmaus, Thomas Wild, Wolfgang Schröder-Preikschat, Andreas Herkersdorf: SHARQ: Software-Defined Hardware-Managed Queues for Tile-Based Manycore Architectures. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIX), 2019 mehr… BibTeX

2018

  • Sven Rheindt, Andreas Schenk, Akshay Srivatsa, Thomas Wild and Andreas Herkersdorf: CaCAO: Complex and Compositional Atomic Operations for NoC-based Manycore Platforms. ARCS 2018 - 31st International Conference on Architecture of Computing Systems, 2018 mehr… BibTeX

2017

  • Akshay Srivatsa, Sven Rheindt, Thomas Wild, Andreas Herkersdorf: Region Based Cache Coherence for Tiled MPSoCs. 2017 30th IEEE International System-on-Chip Conference (SOCC), 2017 mehr… BibTeX