Masterarbeiten

Offene Arbeiten

Masterarbeiten

FPGA-based Payload Interface Module for Satellite Applications

Tracing of thread execution and memory allocation

5G ultra-reliable low-latency communications

Laufende Arbeiten

Masterarbeiten

Design and Implementation of a DMA Controller in a Network Interface for a Fault-Tolerant Hybrid Network on Chip

FPGA-Based Cell Detection for Digital Holographic Microscopy

Exploring the Dynamicity of Region Based Cache Coherence for Distributed Shared Memory MPSoCs on an FPGA Prototype

Interference Channel Analysis (at GE Aviation)