Chip Multicore Processors

Module Number: EI7271

Duration: 1 Semester

Occurence: Summer semester

Language: English

Number of ECTS: 6

Staff

Professor in charge: Andreas Herkersdorf

Amont of work

Contact hours: 45

Self-studying hours: 135

Total: 180

Description of achievement and assessment methods

Final exam in written for.

Exam type: written

Exam duration: 75 min.

Possibilityof re-taking: In the next semester: Yes  At the end of the semester: No

Homework: Yes

Lecture: No

Conversation: No

Written paper: No

Rercommended requirements

Basic understanding of computer architectures. Ideally: 'System-on-Chip 1' lecture.

Contents

The lecture starts with the motivation for chip multicore processors. Starting from the technological background, the potential and challenges of parallel execution are discussed and state-of-the-art processors will be presented to classify multicore processors. A central aspect of chip multicore processors is the memory hierarchy. With the introduction of caches the coherency problem arises. Solutions for this problem are discussed during the lecture. The implementation of synchronization, both from the hardware and the software view, are discussed subsequently. Non-blocking data structures and Transactional Memory are introduced as possible solutions to relax the synchronization problem. The on-chip interconnect, and especially Network-on-Chip (NoC) are discussed in detail as part of the lecture. Finally, programing models and implementation challenges are discussed.

Study goals

During this course the students will learn the basics of problems and approaches of parallel execution with chip multicore processors.

The relevant problems will be conceptually discussed and state-of-the-art processor example will be presented. Students will learn how to classify processor architectures with respect to their characteristics.

Teaching and learning methods

The basic learning method is presentation during the lecture, supplemented with group discussions. During the tutorial examples will be discussed. For a better understanding students will read scientific publications as self studies. Case studies will be discussed to get a practical understanding of chip multicore processors.

Media formats

The following types of media are used:

  • Presentation with notebook and projector
  • lecture notes
  • scientific publications

Literature

  • John L. Hennessy und David A. Patterson, Computer Architecture - A Quantitative Approach, Academic Press, 4. Edition
  • Maurice Herlihy und Nir Shavit, The Art of Multiprocessor Programming, Morgan Kaufmann, 1. Edition
  • David E. Culler, J. P. Singh und Anoop Gupta, Parallel Computer Architecture: A Hardware/Software Approach, Morgan Kaufmann, 1. Edition