System-on-Chip Platforms

Module Number: EI5077

Duration: 1 Semester

Occurence: Summer semester

Language: English

Number of ECTS: 6

Staff

Professor in charge: Andreas Herkersdorf

Amount of work

Contact hours: 45

Self-studying hours: 135

Total: 180

Description of achievement and assessment methods

The module exam is a written exam.

Students will demonstrate that they have gained both fundamental and deeper understanding in various aspects of System-on-Chip Platforms. They have to answer the questions with self-formulated responses, checking boxes of multiple choice questions, sketch circuit or qualitative performance diagrams and do quantitative calculations. The allowed support material is constraint to a single sheet, individually prepared reminder notice.

Exam type: written

Exam duration: 75 min.

Possibility of re-taking: In the next semester: Yes; at the end of the semester: No

Homework: No

Lecture: No

Conversation: No

Written paper: Yes

Recommended requirements

Basic skills in digital IC design are a necessary prerequisite for SoC Platforms, SoC Technologies is recommended. This includes knowledge on building blocks of integrated circuits, designing finite state machines (FSMs), memory technologies and on IC design platforms (FPGA, ASIC, SoC).

Contents

System-on-Chip Platforms (SoCP) extends the understanding of SoC technologies and design by investigating the architectural composition of multiple real-world case studies taken from existing SoC products in the networking, signal processing and graphics processing application domains (SONET/SDH) transmission framers in wide are networks (WAN), LAN/SAN (Local area / system area network) switches, network and GPU/GPGPU graphics processors. Subject are also architecture extensions of today's processors, liek out-of-order execution, multi-threading and the basics of protocols for the interaction of software and hardware in embedded systems. In the case studies application-specific requirements for processing performance, memory size, access speed and bandwidth, control circuit clock rates, silicon area, power consumption and packaging are analyzed.

Study goals

The objective of this course is to improve the understanding of System-on-Chip Technologies and design flow towards existing SoC Platforms. This includes analyzing and dimensioning examples for crucial IC system parameters in a wide range of SoC products.

Teaching and learning methods

  • Teaching method: Lecture material is accompanied by corresponding tutorials. Students are expected to study provided reference literature on investigated  SoC platforms and additional excercises in hoem assignments. Reference literature and home assignment exercises are also subject of examination.

Media formats

The following kinds of media are used:

  • Presentations
  • Lecture notes
  • Data sheets and reference literature on investigated SoC platforms
  • Additional excercises students are expected to work through in preparation for lectures and exam
  • Exercises with solutions as download

Literature

The following literature is recommended:

  • J. Hennessy. "Comp. Architectur-A Quantit. Approach"
  • J. Rabaey. "Digital Integrated Circuits", Prentice Hall
  • A. Tannenbaum. "Computer Networks"