The number of mobile users has increased rapidly over the past few years and is reported to surpass desktop web browsing traffic. Google reports that already more searches take place on mobile devices than on desktops in major ten countries including US and Japan. This trend is likely toaccelerate with the exploding sales of tablet devices which has grown ever faster than PCs. Not only the mobile web traffic, but also computation demand of the mobile webpages is significantly increasing.
The existing power management techniques for web browsing workload on state-of-the-art Android systems leave much room for power optimization. Power management on Android systems is performed in collaboration between the Android governor which manages operating voltage and frequency, the scheduler which allocates and schedules threads to each CPU core, and the power control unit which manages the power state of each CPU such as power down. However, the components are not designed in a way to minimize the power consumption, nor collaborate closely to reach a system-wide optimal solution. Moreover, the Android default CPU governors are not aware of the performance requirements from the user so that the governors can conservatively reduce the operating frequency in order to optimize the response time. As a result, perhaps the most precious resource in a mobile system, the battery energy, is wasted in many real usage scenarios.
Some examples for research problems in this area are:
- Power optimization vs. user perception
- Execution phase detection
- Web page oriented power management
- Phase-Aware Web Browser Power Management on HMP Platforms (Nadja Peters, Sangyoung Park, Daniel Clifford, Sami Kyostila, Ross McIlroy, Benedikt Meurer, Hannes Payer, Samarjit Chakraborty), In International Conference on Supercomputing (ICS), 2018.
- Web Browser Workload Characterization for Power Management on HMP Platforms (Nadja Peters, Sangyoung Park, Samarjit Chakraborty, Benedikt Meurer, Hannes Payer, Daniel Clifford), In International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2016.