Fabrizio De Santis

Technische Universität München

Lehrstuhl für Sicherheit in der Informationstechnik (Prof. Sigl)

Dienstort:

Theresienstr. 90(0101)/I
80333 München
Telefon: +49 (89) 289 - 28259
Raum: 0101.01.007

E-mail:
PGP-Key: pk.asc
Fingerprint: C8C5 D403 A4FE DC98 B096 DFFA B137 FD49 8B83 7FAC

Research interests:

Side-channel and fault analysis

Hardware and software countermeasures against side-channel attacks

Efficient implementations of cryptographic algorithms

Papers and technical reports:

S. Streit and F. De Santis, Post-Quantum Key Exchange on ARMv8-A -- A New Hope for NEON made Simple, cryptology e-Print archive, report 2017/388 (pdf and code).

F. Unterstein, J. Heyszl, F. De Santis, and R. Specht, Dissecting Leakage Resilient PRFs with Multivariate Localized EM Attacks - A Practical Security Evaluation on FPGA, to appear in Proceedings of 8th International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE 2017), Paris, France (pdf).

O. Guillen, M. Gruber, and F. De Santis, Low-cost Setup for Localized Semi-invasive Optical Fault Injection Attacks - How Low Can We Go?, to appear in Proceedings of 8th International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE 2017), Paris, France (code).

P. Koppermann, F. De Santis, J. Heyszl, and G. Sigl, Automatic Generation of High-Performance Modular Multipliers for Arbitrary Mersenne Primes on FPGAs, in Proceedings of IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2017), Washington DC, VA, USA (code).

F. De Santis, A. Schauer, and G. Sigl, ChaCha20-Poly1305 Authenticated Encryption for High-Speed Embedded IoT Applications, to appear in Proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE 2017), Lausanne, Switzerland (code).

H. Seuschek, O. Guillen, and F. De Santis, Side-Channel Leakage Aware Instruction Scheduling, to appear in Proceedings of 4th Workshop on Cryptography and Security in Computing Systems (CS2 2017), Stockholm, Sweden.

F. De Santis, T. Bauer, and G. Sigl, Squeezing Polynomial Masking in Tower Fields, in Proceedings of 15th Smart Card Research and Advanced Application Conference (CARDIS 2016), Cannes, France.

O. Guillen, F. De Santis, R. Brederlow and G. Sigl. Towards Side-Channel Secure Firmware Updates, in Proceedings of  9th International Symposium on Foundations and Practice of Security (FPS 2016),  Quebec City, Quebec, Canada.

F. De Santis, T. Bauer, and G. Sigl, Hiding Higher-Order Univariate Leakages by Shuffling Polynomial Masking Schemes,  in Proceedings of Theory of Implementation Security Workshop (TIs 2016), ACM CCS, October 24, 2016, Vienna, Austria.

P. Koppermann, F. De Santis, J. Heyszl, and G. Sigl, X25519 Hardware Implementation for Low-Latency Applications, in Proceedings of 19th Euromicro Conference on Digital System Design (DSD 2016), August 31- September 2, 2016, Limassol, Cyprus.

M. Tempelmeier, F. De Santis, J.-P. Kaps, and G. Sigl, An Area-Optimized Serial Implementation of ICEPOLE Authenticated Encryption Schemes, in Proceedings of IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2016), May 3-5, 2016, Washington DC, VA, USA.

H. Seuschek, J. Heyszl, and F. De Santis, A Cautionary Note: Side-Channel Leakage Implications of Deterministic Signature Schemes, in Proceedings of the 3rd Workshop on Cryptography and Security in Computing Systems (CS2 2016), ACM, January 18-20, 2016, Prague, Czech Republic.

F. De Santis, S. Rass, On Efficient Leakage Resilient Pseudo-Random Functions from Hard-to-Invert Leakages, to appear in Third International Conference on Cryptology and Information Security in Latin America (LATINCRYPT 2014), September 2014, Florianópolis, Brazil.

F. De Santis, O. M. Guillen, E. Sakic and G. Sigl, Ciphertext-Only Fault Attacks on PRESENT,  in Third International Workshop on Lightweight Cryptography for Security & Privacy (LightSec 2014), September 2014, Istanbul, Turkey.

F. De Santis, M. Kasper, S. Mangard, G. Sigl, O. Stein and M. Stöttinger, On the Relationship Between Correlation Power Analysis and the Stochastic Approach: an ASIC Designer Perspective, in the proceedings of 14th International Conference on Cryptology in India (INDOCRYPT), Lecture Notes in Computer Science vol. 8250, p. 215-226, 7-10 December 2013, Mumbai, India (pdf). 

J. Heyszl, A. Ibing, S. Mangard, F. De Santis and G. Sigl, Clustering Algorithms for Non-Profiled Single-Execution Attacks on Exponentiations, in the proceedings of 12th Smart Card Research and Advanced Application Conference (CARDIS), Lecture Notes in Computer Science vol. 8419, p. 79-93, 27-29 November 2013, Berlin, Germany (pdf).

S. Belaid, F. De Santis, J. Heyszl, S. Mangard, M. Medwed, J.-M. Schmidt, F.-X. Standaert and S. Tillich, Towards Fresh Re-Keying with Leakage-Resilient PRFs: Cipher Design Principles and Analysis, in the proceedings of PROOFS 2013 (Security Proofs for Embedded Systems), Santa-Barbara, California, August 2013 (slides). Extended version in the Journal of Cryptographic Engineering, vol 4, num 3, pp 157-171, September 2014, Springer.

S. Belaid, F. De Santis, J. Heyszl, S. Mangard, M. Medwed, J.-M. Schmidt, F.-X. Standaert and S. Tillich, Towards Fresh Re-Keying with Leakage-Resilient PRFs: Cipher Design Principles and Analysis, cryptology e-Print archive, report 2013/305 (pdf).

A. Barenghi, L. Breveglieri, F. De Santis, F. Melzani, A. Palomba and G. Pelosi, Design Time Engineering of Side Channel Resistant Cipher Implementations, in A. Elçi, J. Pieprzyk, A. G. Chefranov, M. A. Orgun, H. Wang, and R. Shankaran, editors, Theory and Practice of Cryptography Solutions for Secure Information Systems, Advances in Information Security, Privacy, and Ethics (AISPE), p. 133–157. IGI Global, Hershey, PA, USA, February 2013 (pdf).

J. Heyszl, D. Merli, B. Heinz, F. De Santis and G. Sigl: Strengths and Limitations of High-Resolution Electromagnetic Field Measurements for Side-Channel Analysisin the proceedings of 11th Smart Card Research and Advanced Application Conference (CARDIS), Lecture Notes in Computer Science vol 7771, p. 248-262, Graz, Austria, November 2012 (pdf). 

M. Hiller, F. De Santis, D. Merli and G. Sigl, Reliability Bound and Channel Capacity of IBS-based Fuzzy Embedders, NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE, pp. 213-220, June 2012.

A. Barenghi, G. M. Bertoni, F. De Santis and F. Melzani, On the Efficiency of Design Time Evaluation of the Resistance to Power Attacks, in Proceedings of 14th Euromicro Conference on Digital System Design (DSD 2011), August 31- September 2, 2011, Oulu, Finland.

G. Agosta, A. Barenghi, F. De Santis and G. Pelosi, Record Setting Software Implementation of DES Using CUDA, In Proceedings of the 2010 Seventh International Conference on Information Technology: New Generations (ITNG 2010). IEEE Computer Society, Washington, DC, USA, 748-755 (pdf, poster).

G. Agosta, A. Barenghi, F. De Santis, A. Di Biagio and G. Pelosi, Fast Disk Encryption Through GPGPU Acceleration, 10-th International Conference on Parallel and Distributed Computing, Applications and Technologies, PDCAT 2009, Hiroshima, Japan, 8-11, December 2009, IEEE Computer Society 2009, pp. 102-109 (pdf).

Teaching:

Teaching Assistant for the Lecture Secure Implementation of Cryptographic Algorithms WS 2016-2017. Material for class assignments can be found here (registration to the lecture is required).

Open positions for students (HIWI):

  • VHDL/FPGA Designer
  • ARM Cortex-M/Cortex-A Developer
  • Python developer with knowlegde of Machine Learning

Open topics for students (IP/FP/IDP/BA/MA):

  • Topics for IP/FP/IDP/BA/MA in the field of secure cryptographic implementations, side-channel and fault analysis are available anytime upon request (Deutsch/English). Some offers are listed here.
  • Subjects for students in Computer Science or Mathematics are available upon request.

Please feel free to contact me per E-mail.