In recent years, various side-channel attacks emerged [2,3] that aim to steal secret information from the power side-channel without direct physical access. Instead, these attacks make use of resources that are present inside the victim environment and can be controlled remotely.

A possibility to mount such kind of attacks is the use of internal sensors based on FPGA primitives that transfer the internally-measured side-channel leakages outside. Time-to-Digital Converters(TDCs) [1] constitute a primitive that can be used to monitor these internal voltage fluctations.

The goal of this topic is to provide an overview about TDC-based side-channel attacks and their comparison to setups that collect measurements externally by using an oscilloscope.

[1] Gnad et al.: "Analysis of transient voltage fluctuations in FPGAs", International Conference on Field-Programmable Technology (FPT), 2016
[2] Schellenberg, et al. "An inside job: Remote power analysis attacks on FPGAs", DATE, 2018
[3] Martínez-Rodríguez et al.: "SoK: Remote Power Analysis", 2021. https://eprint.iacr.org/2021/015

In recent years, various side-channel attacks emerged [2,3] that aim to steal secret information from the power side-channel without direct physical access. Instead, these attacks make use of resources that are present inside the victim environment and can be controlled remotely.

A possibility to mount such kind of attacks is the use of internal sensors based on FPGA primitives that transfer the internally-measured side-channel leakages outside. Time-to-Digital Converters(TDCs) [1] constitute a primitive that can be used to monitor these internal voltage fluctations.

The goal of this topic is to provide an overview about TDC-based side-channel attacks and their comparison to setups that collect measurements externally by using an oscilloscope.

[1] Gnad et al.: "Analysis of transient voltage fluctuations in FPGAs", International Conference on Field-Programmable Technology (FPT), 2016
[2] Schellenberg, et al. "An inside job: Remote power analysis attacks on FPGAs", DATE, 2018
[3] Martínez-Rodríguez et al.: "SoK: Remote Power Analysis", 2021. https://eprint.iacr.org/2021/015

Side-Channel Analysis (SCA) exploits information leaked by a device over its timing behavior, power consumption or EM emanations to reveal, e.g., the secret key of a cryptographic algorithms is retrieved. “Classical” SCA methods such as Differential Power Analysis (DPA) or Correlation Power Analysis (CPA) collect a number of measurements for different input values of the algorithm under attack and combine the leakage of different measurements to conduct the attack.

Instead, Algebraic SCA [1] makes use of the internal state of the attacked algorithm to formulate a SAT problem and thus allows for combining different leakages. Furthermore, attacks on a single measurement are possible, an attacker does not need to know inputs and outputs and even countermeasures such as masking schemes can circumvented.

The goal of this topic is to provide an overview over existing approaches on algebraic side-channel analysis that exceeds the seminal works in [1-2] and to outline current trends and applications ofalgebraic attacks.

 [1] Renauld, M. & Standaert, F.-X.: Algebraic Side-Channel Attacks. Information Security and Cryptology, Springer Berlin Heidelberg, 2010, 393-410
[2] Renauld, M.; Standaert, F.-X. & Veyrat-Charvillon, N.: Algebraic Side-Channel Attacks on the AES: Why Time also Mtters in DPA Cryptographic Hardware and Embedded Systems - CHES 2009, Springer Berlin Heidelberg, 2009, 97-111

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Side-Channel Analysis (SCA) exploits information leaked by a device over its timing behavior, power consumption or EM emanations to reveal, e.g., the secret key of a cryptographic algorithms is retrieved. “Classical” SCA methods such as Differential Power Analysis (DPA) or Correlation Power Analysis (CPA) collect a number of measurements for different input values of the algorithm under attack and combine the leakage of different measurements to conduct the attack.

Instead, Algebraic SCA [1] makes use of the internal state of the attacked algorithm to formulate a SAT problem and thus allows for combining different leakages. Furthermore, attacks on a single measurement are possible, an attacker does not need to know inputs and outputs and even countermeasures such as masking schemes can circumvented.

The goal of this topic is to provide an overview over existing approaches on algebraic side-channel analysis that exceeds the seminal works in [1-2] and to outline current trends and applications ofalgebraic attacks.

 [1] Renauld, M. & Standaert, F.-X.: Algebraic Side-Channel Attacks. Information Security and Cryptology, Springer Berlin Heidelberg, 2010, 393-410
[2] Renauld, M.; Standaert, F.-X. & Veyrat-Charvillon, N.: Algebraic Side-Channel Attacks on the AES: Why Time also Mtters in DPA Cryptographic Hardware and Embedded Systems - CHES 2009, Springer Berlin Heidelberg, 2009, 97-111

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Physical Unclonable Functions (PUFs) exploit manufacturing process variations to generate unique signatures. PUF and error-correcting codes can be joined together to reliably generate cryptographically strong keys. However, the implementation of error-correcting codes is prone to physical attacks like side-channel attacks. Side-channel attacks exploit the information leaked during the computation of secret intermediate states to recover the secret key. Therefore, the implementation of error-correcting codes must also involve the implementation of proper countermeasures against side-channel attacks.

The goal of this thesis is to evaluate the side-channel resistance of a secure implementation of error-correcting codes for PUFs on FPGA. The thesis consists of the following steps:

• Get familiar with currently available implementations of error-correcting codes for PUFs
• Adapt and improve current implementations (VHDL)
• Develop a measurement setup for side-channel analysis (Matlab/Python)
• Perform side-channel analysis using the state-of-the-art EMF measurement equipment in our lab (Oscilloscope knowledge + Matlab/Python required)

 The ideal candidate should have:

• Previous experience in field of digital design (VHDL/Vivado/Xilinx FPGA)
• Basic knowledge on using lab equipment (e.g Oscilloscope,...)
• Basic knowledge in statistics
• Good programming skills in Matlab/Python
• Attendance at the lecture “Secure Implementation of Cryptographic Algorithms” is advantageous

Dr.-Ing. Michael Pehl
Chair for Security in Information Technology
Head: Prof. Dr.-Ing. Georg Sigl
Technical University of Munich
Arcisstr. 21, 80333 Munich (Germany)

Email: m.pehl@tum.de