Foto von Mathieu Gross

M.Sc. Mathieu Gross

Technische Universität München

Lehrstuhl für Sicherheit in der Informationstechnik (Prof. Sigl)

Dienstort

Lehrstuhl für Sicherheit in der Informationstechnik (Prof. Sigl)

Work:
Theresienstr. 90(0101)/1.ZG
80333 München

Raum: N1008

PGP : D839 82EB 88BC BD7D 228F 8F27 86FE F454 AB03 5853

Research interests

  • Security of modern FPGA-SoC architectures
  • Microarchitectural attacks

BA/MA/FP opportunities

If you are interested to work in one of my research domains,  feel free to contact me for possible Bachelor Thesis, Master Thesis or Forschung Praxis opportunities.

Forschungspraxis (Research Internship)

Fuzzing of the Accelerator Coherency Port on Zynq Ultrascale+

Teaching

Praktium Industrie 4.0

Praktikum Elektrotechnik und Informationstechnik

Publications

  • Mathieu Gross, Nisha Jacob, Andreas Zankl and Georg Sigl: Breaking TrustZone Memory Isolation through Malicious Hardware on a Modern FPGA-SoC. 3rd Attacks and Solutions in Hardware Security Workshop (ASHES '19), November 15, 2019, London, United Kingdom
  • Georg Sigl, Mathieu Gross and Michael Pehl: Where Technology Meets Security: Key Storage and Data Separation for System-on-Chips. ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC), 2018Dresden, Germany
  • Johanna Sepulveda, Mathieu Gross, Andreas Zankl and Georg Sigl: Towards Trace-driven Cache Attacks on Systems-on-Chips – Exploiting Bus Communication. 12th International symposium on reconfigurable communication-centric system on Chip (RECOSOC), 2017Madrid Spain
  • Johanna Sepulveda, Mathieu Gross, Andreas Zankl and Georg Sigl: Exploiting Bus Communication to Improve Cache Attacks on Systems-on-Chips. IEEE Computer Society Annual Symposium on VLSI 2017 , 2017Bochum, Germany